03. Environment Setup & Testing

Owner	MM. G. Sadek
Tags

01 - Objective

In this Lab tutorial, we will learn how to install software tools required to develop, simulate and test VHDL code, also those required to upload the compiled code to the FPGA hardware.

At the end of this tutorial you should have the required software tools and have good understanding of how to create a project from scratch, add VHDL code, perform pin assignment, compile and upload the compiled code to the hardware FPGA and test it.

02 - Downloads:

https://github.com/jvitkauskas/Altera-Cyclone-IV-board-V3.0

Altera Cyclone IV Development board pin information: Altera-Cyclone-IV-board-V3.0/Hardware documentation at master · jvitkauskas/Altera-Cyclone-IV-board-V3.0 (github.com)

https://www.intel.com/content/www/us/en/software-kit/684216/intel-quartus-prime-lite-edition-design-software-version-21-1-for-windows.html?

03 - Preparing Developing Environment:

Step1: Installation:

Download & install the appropriate software applications from the following link: Intel® Quartus® Prime Lite Edition Design Software Version 21.1 for Windows

You can follow the steps in this video for download and installation: Downloand and Install Quartus Prime Lite 20.1 on Windows 10 - YouTube

Make sure to download these files:

Make sure to put all downloaded files in the same directory then run the QuartusLiteSetup file

To install QuartusLiteSetup, QuartusProgrammerSetup and Questa - Intel FPGA Starter Edition, select the required installations as in the following image.

After installation finishes, select Run Blaster II programmer driver installation to install drivers required by the Blaster II programmer.

Step2:

After successfully installation and installing the drivers, connect the USB Blaster and follow the steps in this wiki to install the compatible drivers:
Altera USB Blaster Driver Installation Instructions - Terasic Wiki
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Warning: Do not insert to remove the USB Blaster ribbon cable while the device is powered on. There was an included warning that the board would likely be damaged. I did not test this.
Steps summary:
Source: GoJimmyPi: First FPGA Test Drive with Altera Cyclone IV
1. Plug the USB-Blaster II cable into your PC.
1. Open the Device Manager, and right-click on the Unknown device under the Other devices branch.
1. Select Update Driver Software.
1. Select Browse my computer for driver software.
1. Enter the location of the Quartus Prime software USB-Blaster II driver files directory (<Path to Quartus Prime installation>\drivers\usb-blaster-ii) in the Search for driver software in this location field.
1. Click Next.
1. Click Install in the Would you like to install this device software? Windows security dialog box.
1. Close the Update Driver Software - Altera USB-Blaster II (Unconfigured) successful installation notification. The Device Manager now shows a new branch called JTAG cables with an Altera USB-Blaster II (Unconfigured) node.
1. Open the Quartus Prime Programmer. Within a few seconds, the JTAG cables branch displays two nodes: Altera USB-Blaster II (JTAG interface) and Altera-USB Blaster II (System Console interface).

04 - Running your first test project:

Step1: Create a new project:

Source: Intel® Cyclone® 10 LP FPGA Board - How to Program Your First FPGA

Run the Quartus Prime Lite Edition program.

Open File menu and select New Project Wizard.

You may need to press Next to move to the next window.

Enter the directory for the project, a project name.
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Important: You must choose a read/write directory, such as Documents directory.

Press Next and select am Empty Project, then press Next.

We don’t need to add any files right now, so, we bypass the next window by pressing Next.

Now, we need to select the device that we will use, our main chip is the ALTERA FPGA CycloneIV series EP4CE6E22C8N the fourth generation. So, select the right chip and press Next.

We won’t change default tool settings, so, press Next. Or, we can select the desired simulation tool, choose QuestaSim tool with VHDL format.

A summary should be shown.

Now, press the Finish button to finish creating our new project.

Our project should be shown in the Project Navigator

Step2: Adding a new VHDL File to your project:

From File menu, choose New.

In the New dialog window, under Design Files, select VHDL File and press OK.

Step3: Entering VHDL code:

Now, enter your code into the text editor area.
- Sample Code:
```
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY lab_00 is
	PORT (
	x1, x2 : in STD_LOGIC;
	f1, f2, f3, f4 : out STD_LOGIC
	);
END lab_00;

ARCHITECTURE Behavioral of lab_00 is begin
	f1 <= NOT x1;
	f2 <= x1 AND x2;
	f3 <= x1 OR x2;
	f4 <= x1 XOR x2;
END Behavioral;
```
  💡
  Important: In VHDL, the Entity name must be the same as the project name, otherwise, you have to add the new entity as the top-level entity of the project [Tutorial to add the new entity as the top-level: Intel Quartus Prime Tutorial Part 6 | Error Top-level design entity "name" is undefined - YouTube]

Then, save the file and name it.

Step4: Pin Assignment & Compiling:

To compile the project, open the menu Processing and press Start Compilation.
- While the pins are not actually assigned, there will be a compiler warning, telling that no pins are assigned for input/output pins used.

Click on Assignments menu and select Pin Planner.
💡
Important: we must have explicitly assigned our chip part number, otherwise this feature is not available

Double-click in the Location column in front of each input/output pin, a drop-down list will appear.

We need to assign the pins to push buttons and LED as shown in the schematic:
- Altera Cyclone IV Development board pin allocation table:

Now, close the Pin Planner and compile again.

Step5: Visual verification of the design:

We can show the circuit implemented by our VHDL code using RTL view. From Tools menu, open Netlist Viewers and select RTL viewer.

The circuit gates, input/output pins and connections will be displayed as following:

Step6: Uploading the compiled code to the FPGA hardware:

Finally, we're ready to send the FPGA code to our device. To Program the FPGA kit: Click Tools menu then select Programmer.

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Hint: If the currently selected hardware says "No Hardware", click the "Hardware Setup" button (make sure your device is plugged in, and drivers installed)

To send the FPGA code to the device, select "Processing - Start" (or simply press the "Start Button").

If successful, there will be an indication in the progress box.

That's it! There's now 4 gate programmed in the FPGA. Press S1 or S2 to have the corresponding LEDs ON or OFF verifying the 4 gates.

Important Notes:

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Important: 1. Output LEDs are active low, that on HIGH output, LED is OFF and on LOW output the LED is ON. To solve this and provide better user-friendly output, we can invert output before assigning to the output pin. 2. Input push buttons are active LOW, having pull-up resistors. Meaning that, on no press, the button inputs HIGH and on press, the button inputs LOW.

So, we can use the following code instead, to provide the same behavior for the desired gates in a user-friendly manner.

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY lab_00 is
PORT (
		x1, x2 : in STD_LOGIC;
		f1, f2, f3, f4 : out STD_LOGIC
	);
END lab_00;

ARCHITECTURE Behavioral of lab_00 is begin
	f1 <= NOT x1;
	f2 <= NOT(NOT x1 AND NOT x2);
	f3 <= NOT(NOT x1 OR  NOT x2);
	f4 <= NOT(NOT x1 XOR NOT x2);
END Behavioral;

05 - Sources:

GoJimmyPi: First FPGA Test Drive with Altera Cyclone IV

https://www.intel.com/content/www/us/en/developer/articles/training/intel-cyclone-10-lp-fpga-board-how-to-program-your-first-fpga.html